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Re: [RARE-users] [freertr] clear p4lang p4 - required in case of interface addition


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  • From: mc36 <>
  • To: Alexander Gall <>,
  • Subject: Re: [RARE-users] [freertr] clear p4lang p4 - required in case of interface addition
  • Date: Tue, 13 Dec 2022 18:10:53 +0100

hi,
welcome back! sorry for breaking the builds again! :)
i'll keep it in mind when changing a thing in the future!
thanks,
cs


On 12/13/22 17:33, Alexander Gall wrote:
Hi Xavier, csaba

Unfortunately, the builds on the Hydra CI started to fail on October
23. The updates to the p4 code added by
https://bitbucket.software.geant.org/projects/RARE/repos/rare/commits/5b0e7593899e2271df3f654a14cf62ab440edba6
appears to have been broken completely due to a missing p4 header
file. That was fixed in an update on October 27 but those changes
also broke the builds for Tofino2 for some profiles due to table sizes
that were too large to fit in the ingress pipeline. As a consequence,
tna-install-latest and tna-install-experimental could not fetch the
pre-built artifacts from the binary cache, hence the fallback to
building from source on the target device, which requires access to
the SDE and BSP source code :(

It seems like basically *any* change to the p4 code, even really
trivial ones, will make it necessary to re-run the optimizer for
Tofino2. I honestly think that Intel is over-engineering the optimizer
of the compiler to squeeze out more table space in the MAUs...

@csaba: this means that we can no longer update the p4 code in the
RARE repo before checking that it also compiles for Tofino2.

I'll run the optimizer sometime this week to get back to a successful
build.




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