Subject: Rare project developers
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- From: Ronald van der Pol <>
- To: Tim Chown <>
- Cc: , mc36 <>, Ronald van der Pol <>, "" <>
- Subject: Re: [rare-dev] [gn4-3-wp6-t1-wb-RARE] INT/iOAM
- Date: Thu, 8 Apr 2021 19:26:47 +0200
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On Thu, Apr 08, 2021 at 14:58:24 +0000, Tim Chown wrote:
> One of the open issues is with the clock synchronisation, as reported above.
Hmm. page 27:
"Another constraint to consider when creating P4 programs is that
Tofino chips do allow complex computations on headers to maintain line
rate, such as multiplication to convert the time expressed in nanoseconds
to other time units (e.g., microseconds)."
I think "... do NOT allow ..." was intended.
And I am not sure I agree. I think the hash unit can shift and
thus multiply by 1024. But it does not solve the wrap-around.
I don't understand the reasoning.
But maybe I don't understand what this paragraph intents to say.
> I guess most NRENs will likely see IAOM (implemented by Cisco, Juniper, etc)
> than INT, but to have an INT implementation that NRENs can experiment with
> would be interesting.
I agree with Csaba here. If we implement it, why not make it
such that it operates with Cisco/Juniper? The differences are
not that large.
rvdp
- Re: [rare-dev] [gn4-3-wp6-t1-wb-RARE] INT/iOAM, Tim Chown, 04/08/2021
- Re: [rare-dev] [gn4-3-wp6-t1-wb-RARE] INT/iOAM, Ronald van der Pol, 04/08/2021
- Re: [rare-dev] [gn4-3-wp6-t1-wb-RARE] INT/iOAM, mc36, 04/08/2021
- Re: [rare-dev] [gn4-3-wp6-t1-wb-RARE] INT/iOAM, Ronald van der Pol, 04/08/2021
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